Stray (Parasitic) Capacitance: Causes, Effects, Miller Effect & Reduction (with MCQs)

No one solders it onto the board, yet it is everywhere: between two PCB tracks, between transformer windings, inside every transistor and even between an insulator disc and the tower. This stray (parasitic) capacitance slows digital edges, limits amplifier bandwidth, couples noise into sensitive circuits and makes insulator strings share voltage unequally. It is a common viva and written question in electronics, power-system and instrumentation exams. This post explains it with an animation, numbers and MCQs.

⚡ Key takeaways

• Stray capacitance is unwanted capacitance that exists between any two conductors at different potentials separated by an insulator.
• Its reactance X_C = 1/(2πfC) falls as frequency rises, so it is negligible at 50 Hz but critical at MHz–GHz.
• Effects: reduced bandwidth, slower rise time (t_r ≈ 2.2RC), crosstalk, oscillation, Miller effect, unequal voltage across insulator strings.
• Reduction: short/wide-spaced traces, ground planes and guard rings, shielding, low-impedance drive, cascode stages, 10× probes, grading rings.

📑 Contents

1. What is stray capacitance?
2. Where does it come from?
3. Effect on a fast signal (animation)
4. Effects on circuits and systems
5. Miller effect
6. Stray capacitance in power systems
7. How to reduce stray capacitance
8. Solved problems
9. Practice MCQs
10. বাংলায় দ্রুত রিভিশন

1. What Is Stray Capacitance?

Stray capacitance (also called parasitic capacitance) is the unintended capacitance between conductors, components or between a conductor and ground. Any two conductors separated by an insulator form a capacitor: C = ε₀ε_rA/d. Values are tiny (typically 0.1 pF to a few hundred pF), but because X_C = 1/(2πfC), they matter more and more as frequency or edge speed increases.

2. Where Does It Come From?

• Between adjacent PCB tracks, between a track and the ground plane, and across IC pins.
• Between component leads and inside components (resistor end caps, inductor turns → self-resonance).
• Semiconductor junctions: C_gs, C_gd of MOSFETs; C_be, C_cb of BJTs; diode junction capacitance.
• Cables: a typical 50 Ω coaxial cable has about 100 pF per metre.
• Test equipment: oscilloscope inputs (~10–20 pF) and probe cables.
• Transformer windings: inter-winding and inter-turn capacitance.
• Power systems: conductors to earth, between phases, insulator discs to tower.

3. Effect on a Fast Signal (Animation)

A 500 kHz square wave from a 1 kΩ source drives a node with increasing stray capacitance. The source resistance and stray C form an RC low-pass filter: edges become exponential and the rise time grows as 2.2RC. At about 200 pF the signal barely reaches its full level before the next edge — a digital receiver could misread bits.

Animation 1 – Stray capacitance turns sharp edges into slow RC curves.

4. Effects on Circuits and Systems

1. Reduced bandwidth: with source resistance R, f_3dB = 1/(2πRC). High-impedance nodes are most affected.
2. Slower rise/fall times and timing errors in digital circuits; more power wasted charging capacitance (P = CV²f).
3. Crosstalk / capacitive coupling: a fast signal on one track injects noise into a neighbouring track.
4. Instability and oscillation in amplifiers (extra phase shift in feedback loops; capacitive loads on op-amp outputs).
5. Self-resonance of inductors and transformers — above it, an inductor behaves like a capacitor.
6. Measurement error: probe capacitance loads the circuit under test.
7. Hum and noise pick-up through capacitive coupling to mains wiring.

5. Miller Effect

A small capacitance C_f between the input and output of an inverting amplifier of gain −A_v appears at the input as a much larger capacitance:

C_in,Miller = C_f (1 + |A_v|)

This is why the tiny C_cb of a BJT or C_gd of a MOSFET limits the high-frequency response of common-emitter/common-source amplifiers. Cascode stages and neutralisation reduce it. See also FET vs BJT.

6. Stray Capacitance in Power Systems

• String insulators: each disc has capacitance C, and there is a shunt (stray) capacitance from each link pin to the earthed tower. The disc nearest the line carries the most voltage, so the voltage distribution is unequal. String efficiency = V_total/(n × V_{disc nearest line}) < 100 %. It is improved with longer cross-arms, capacitance grading and guard (grading) rings.
• Line charging current of long lines and cables, Ferranti effect, and capacitive coupling to nearby communication lines.
• Transformer inter-winding capacitance transfers surges from HV to LV side.

7. How to Reduce Stray Capacitance

• Keep high-impedance and high-speed tracks short; increase spacing between conductors.
• Use ground planes, guard traces and guard rings around sensitive nodes; separate analog and digital sections.
• Use shielded cables and enclosures; twisted pairs for differential signals.
• Drive capacitive nodes from low impedance (buffers) and lower impedance levels where possible.
• Use cascode or differential stages to beat the Miller effect; choose low-capacitance devices.
• Use 10× probes (≈ 10 pF instead of ~100 pF loading) and short ground leads when measuring.
• In insulator strings: guard rings and graded discs.

8. Solved Problems

Problem 1. Find the reactance of 10 pF of stray capacitance at (a) 50 Hz and (b) 100 MHz.

1. (a) X_C = 1/(2π × 50 × 10⁻¹¹) ≈ 318 MΩ — negligible.
2. (b) X_C = 1/(2π × 10⁸ × 10⁻¹¹) ≈ 159 Ω — a significant load.

Problem 2. A 10 kΩ node has 10 pF stray capacitance. Find the bandwidth and rise time. f_3dB = 1/(2π × 10⁴ × 10⁻¹¹) ≈ 1.59 MHz; t_r ≈ 2.2RC = 220 ns.

Problem 3. A MOSFET amplifier has C_gd = 2 pF and gain −100. Find the Miller input capacitance. C_M = 2 × (1 + 100) = 202 pF.

9. Practice MCQs (click to see answer)

1. Stray capacitance becomes significant at: (a) DC (b) Low frequency (c) High frequency (d) Never

✔ (c) High frequency.

2. Stray capacitance in an amplifier mainly limits its: (a) Low-frequency gain (b) High-frequency response (c) DC bias (d) Supply voltage

✔ (b) High-frequency response (bandwidth).

3. Miller capacitance equals: (a) C_f/(1 + A) (b) C_f(1 + |A_v|) (c) C_fA² (d) C_f

✔ (b) C_f(1 + |A_v|).

4. Unequal voltage distribution across a string insulator is caused by: (a) Series resistance (b) Shunt capacitance between discs and tower (c) Line inductance (d) Corona only

✔ (b) Shunt (stray) capacitance to the tower.

5. Which method improves string efficiency? (a) Shorter cross-arm (b) Guard ring (c) Removing discs (d) Higher frequency

✔ (b) Guard (grading) ring.

6. A 10× oscilloscope probe is used partly to: (a) Increase loading (b) Reduce capacitive loading on the circuit (c) Increase noise (d) Measure DC only

✔ (b) Reduce loading.

7. Rise time of an RC circuit (10–90 %) is approximately: (a) RC (b) 2.2RC (c) 5RC (d) RC/2

✔ (b) 2.2RC.

8. An inductor behaves like a capacitor above its: (a) Cut-off frequency (b) Self-resonant frequency (c) Nyquist frequency (d) DC point

✔ (b) Self-resonant frequency (due to inter-turn capacitance).

10. বাংলায় দ্রুত রিভিশন

📝 পরীক্ষার আগে এক নজরে

• স্ট্রে (প্যারাসিটিক) ক্যাপাসিট্যান্স: দুইটি পরিবাহীর মধ্যে অনিচ্ছাকৃত ক্যাপাসিট্যান্স — PCB ট্র্যাক, তার, ট্রানজিস্টর জাংশন, ট্রান্সফরমার উইন্ডিং, ইনসুলেটর ও টাওয়ারের মধ্যে।
• X_C = 1/2πfC — উচ্চ কম্পাঙ্কে মান কমে যায়, তাই উচ্চ কম্পাঙ্কে প্রভাব বেশি।
• প্রভাব: ব্যান্ডউইথ কমে, রাইজ টাইম বাড়ে (≈ 2.2RC), ক্রসটক, অসিলেশন, মিলার প্রভাব C(1 + |A|)।
• পাওয়ার সিস্টেমে: স্ট্রিং ইনসুলেটরে অসম ভোল্টেজ বণ্টন → স্ট্রিং দক্ষতা কমে; গার্ড রিং দিয়ে উন্নত করা হয়।
• প্রতিকার: ছোট ট্র্যাক, দূরত্ব বাড়ানো, গ্রাউন্ড প্লেন/গার্ড রিং, শিল্ডিং, ক্যাসকোড, ১০× প্রোব।

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References: Sedra & Smith, Microelectronic Circuits; H. W. Ott, Electromagnetic Compatibility Engineering; V. K. Mehta, Principles of Power System. Images and animations: original work by Totalecer.