Logic gates are the building blocks of every digital system, from a simple alarm circuit to microprocessors and protection relays. Boolean algebra is the mathematics used to design and simplify them. Truth tables, universal gates, De Morgan’s theorem and Boolean simplification appear in almost every BCS (EEE/CSE), PGCB, BPDB, BTCL, bank IT and university digital electronics exam. This post explains all the basic gates with an animated truth table, the key Boolean laws, worked simplifications and MCQs.
- Basic gates: NOT, AND, OR. Derived gates: NAND, NOR, XOR, XNOR.
- NAND and NOR are universal gates: any logic function can be built using only one of them.
- De Morgan: (A·B)' = A' + B' and (A + B)' = A'·B'.
- XOR output is 1 when the inputs are different; XNOR (equivalence) output is 1 when they are the same.
- Common TTL ICs: 7400 NAND, 7402 NOR, 7404 NOT, 7408 AND, 7432 OR, 7486 XOR.
1. Digital Signals and Logic Levels
Digital circuits use only two states, logic 1 (HIGH) and logic 0 (LOW). In standard 5 V TTL, an input above 2.0 V is read as HIGH and below 0.8 V as LOW; the guaranteed outputs are ≥ 2.4 V for HIGH and ≤ 0.4 V for LOW. The difference provides a noise margin of 0.4 V. CMOS logic (e.g. the 4000 and 74HC series) consumes much less power and is used in most modern ICs. In positive logic, the higher voltage represents 1; in negative logic, the lower voltage represents 1.
2. Logic Gates and Truth Tables
| A | B | AND A·B | OR A+B | NAND (A·B)' | NOR (A+B)' | XOR A⊕B | XNOR (A⊕B)' |
|---|---|---|---|---|---|---|---|
| 0 | 0 | 0 | 0 | 1 | 1 | 0 | 1 |
| 0 | 1 | 0 | 1 | 1 | 0 | 1 | 0 |
| 1 | 0 | 0 | 1 | 1 | 0 | 1 | 0 |
| 1 | 1 | 1 | 1 | 0 | 0 | 0 | 1 |
- NOT (inverter): Y = A'. Output is the complement of the input.
- AND: output is 1 only if all inputs are 1, like switches in series.
- OR: output is 1 if any input is 1, like switches in parallel.
- NAND: AND followed by NOT; output is 0 only when all inputs are 1.
- NOR: OR followed by NOT; output is 1 only when all inputs are 0.
- XOR: Y = A'B + AB'. It is 1 for an odd number of 1s, so it is used as a parity generator and as a controlled inverter.
- XNOR: Y = AB + A'B'. It is 1 when the inputs are equal, so it is used as a 1-bit comparator.
An n-input gate has 2n rows in its truth table.
3. Universal Gates
A gate is universal if NOT, AND and OR, and therefore any function, can be built from it alone. Manufacturers like this because a single IC type can implement a whole design.
| Function | Using NAND only | Using NOR only |
|---|---|---|
| NOT | 1 NAND, inputs tied: (A·A)' = A' | 1 NOR, inputs tied: (A+A)' = A' |
| AND | 2 NAND (NAND + NAND-inverter) | 3 NOR (invert both inputs, then NOR) |
| OR | 3 NAND (invert both inputs, then NAND) | 2 NOR (NOR + NOR-inverter) |
| XOR | 4 NAND | 5 NOR |
| XNOR | 5 NAND | 4 NOR |
4. Boolean Algebra Laws
| Law | AND form | OR form |
|---|---|---|
| Identity | A·1 = A | A + 0 = A |
| Null (dominance) | A·0 = 0 | A + 1 = 1 |
| Idempotent | A·A = A | A + A = A |
| Complement | A·A' = 0 | A + A' = 1 |
| Involution | (A')' = A | |
| Commutative | A·B = B·A | A + B = B + A |
| Associative | (AB)C = A(BC) | (A + B) + C = A + (B + C) |
| Distributive | A(B + C) = AB + AC | A + BC = (A + B)(A + C) |
| Absorption | A(A + B) = A | A + AB = A |
| Redundancy | A(A' + B) = AB | A + A'B = A + B |
Note the second distributive law, A + BC = (A + B)(A + C). It is true in Boolean algebra but not in ordinary algebra, and it is a popular exam trap.
5. De Morgan’s Theorems
(A · B)' = A' + B' (A + B)' = A' · B'In words: “break the bar and change the sign.” A NAND gate is therefore equivalent to an OR gate with inverted inputs (a “bubbled OR”), and a NOR gate is equivalent to a bubbled AND. The theorems extend to any number of variables: (A + B + C)' = A'B'C'.
6. Simplification Examples
Example 1. Y = AB + AB' = A(B + B') = A·1 = A.
Example 2. Y = A'B + AB + AB' → group: B(A' + A) + AB' = B + AB' = A + B (redundancy law).
Example 3. Y = (A + B)(A + C) = AA + AC + AB + BC = A(1 + C + B) + BC = A + BC.
Example 4. Y = ((A + B)' + C)' → by De Morgan, = (A + B)·C' = AC' + BC'.
Example 5 (canonical form). From the XOR truth table, the rows with Y = 1 are 01 and 10, so Y = Σm(1, 2) = A'B + AB'. Larger functions are minimized with a Karnaugh map (K-map) by grouping adjacent 1s in blocks of 1, 2, 4 or 8.
7. Applications: Half Adder and More
- Half adder: Sum S = A ⊕ B, Carry C = A·B (one XOR + one AND).
- Full adder: S = A ⊕ B ⊕ Cin, Cout = AB + Cin(A ⊕ B).
- Parity generator/checker: a chain of XOR gates.
- Comparators, multiplexers, decoders, and through flip-flops, counters and registers.
- Interlocks in power systems: e.g. an isolator may operate only when (CB open) AND (earth switch open). Such logic is built into PLCs and numerical relays.
8. Practice MCQs
1. Which gates are universal? (a) AND, OR (b) NAND, NOR (c) XOR, XNOR (d) NOT, AND
2. Output of a 2-input NOR gate is 1 when: (a) Both inputs are 1 (b) Any input is 1 (c) Both inputs are 0 (d) Inputs are different
3. (A + B)' equals: (a) A' + B' (b) A'·B' (c) A·B (d) A ⊕ B
4. A + AB simplifies to: (a) B (b) AB (c) A (d) A + B
5. Minimum number of 2-input NAND gates for an XOR gate: (a) 2 (b) 3 (c) 4 (d) 5
6. IC 7486 contains: (a) NAND gates (b) XOR gates (c) NOR gates (d) Inverters
7. A 4-input gate has how many truth-table rows? (a) 4 (b) 8 (c) 16 (d) 32
8. The XNOR gate is also called: (a) Inverter (b) Equivalence (coincidence) gate (c) Universal gate (d) Buffer
9. Sum output of a half adder is: (a) A·B (b) A + B (c) A ⊕ B (d) (A·B)'
10. A + A'B simplifies to: (a) A (b) B (c) A + B (d) AB
9. বাংলায় দ্রুত রিভিশন
- মৌলিক গেট: NOT, AND, OR; সংযুক্ত গেট: NAND, NOR, XOR, XNOR।
- সার্বজনীন গেট: NAND ও NOR; শুধু এদের দিয়েই যেকোনো লজিক সার্কিট তৈরি করা যায়।
- AND: সব ইনপুট ১ হলে আউটপুট ১; OR: যেকোনো একটি ১ হলে ১; XOR: ইনপুট ভিন্ন হলে ১।
- ডি মরগান: (AB)' = A' + B', (A + B)' = A'B'। “বার ভাঙো, চিহ্ন বদলাও”।
- A + AB = A, A + A'B = A + B, (A + B)(A + C) = A + BC।
- হাফ অ্যাডার: যোগফল = A ⊕ B, ক্যারি = AB। IC: 7400 NAND, 7402 NOR, 7404 NOT, 7408 AND, 7432 OR, 7486 XOR।
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- RISC vs CISC Architecture
- Integrated Circuits: Advantages & Disadvantages
- Digital Signal Processing
References: M. Morris Mano, Digital Logic and Computer Design; Thomas L. Floyd, Digital Fundamentals; Texas Instruments 74-series datasheets. Images and animations: original work by Totalecer.
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