Inside a perfect silicon crystal, every atom is bonded to four neighbours. At the surface that perfect pattern suddenly stops — and the broken bonds left behind change the electrical behaviour of the device. Surface effects explain leakage current in diodes, lost efficiency in solar cells, threshold shifts in MOSFETs and why every chip is covered with oxide. The topic appears in semiconductor-physics and electronic-device exams and in technical viva boards. This post explains it with an animation, a band diagram and solved examples.
- The surface interrupts the periodic lattice, leaving dangling (unsatisfied) bonds.
- These create surface states — allowed energy levels inside the band gap (Tamm and Shockley states).
- Surface states trap charge, causing band bending and surface depletion, accumulation or inversion layers, and can pin the Fermi level.
- They act as recombination centres: surface recombination velocity S (cm/s) measures how fast carriers are lost at the surface.
- Remedy: surface passivation with thermal SiO₂, SiNₓ, Al₂O₃ and hydrogen annealing.
1. Why the Surface Is Special
Energy-band theory assumes an infinite, perfectly periodic crystal. A real crystal ends at a surface, where:
- Atoms have missing neighbours → unpaired electrons in dangling bonds (about 10¹⁵ surface atoms per cm² in silicon).
- The surface may reconstruct (atoms rearrange) and readily adsorbs oxygen, water and contaminants.
- A native oxide or deposited film forms an interface with its own defects and fixed charges.
These disturbances confine their influence to a thin region near the surface, but because modern devices are tiny, that region can control the whole device.
2. Surface States
Surface states are electronic energy levels localised at the surface that lie within the forbidden band gap. Theory predicts them because the periodic potential terminates (Tamm states, 1932; Shockley states, 1939). In practice, defects and adsorbed impurities add more.
- Donor-like states are neutral when filled and positive when empty; acceptor-like states are neutral when empty and negative when filled.
- Density is described by Dit (interface trap density, cm⁻² eV⁻¹). A good thermal Si/SiO₂ interface has Dit ≈ 10¹⁰ cm⁻²eV⁻¹, whereas a bare surface can be many orders of magnitude worse.
- A very high density of surface states can pin the Fermi level at the surface — explaining why metal–semiconductor (Schottky) barrier heights depend only weakly on the metal work function (Bardeen’s model).
3. Band Bending and Surface Layers
When surface states capture electrons or holes, the surface acquires a charge. An equal and opposite space charge forms in the semiconductor just below the surface, and the energy bands bend. For an n-type semiconductor with negatively charged surface states, the bands bend upward, forming a depletion layer:
| Surface condition (n-type) | Band bending | Effect |
|---|---|---|
| Accumulation | Downward | Extra electrons collect at surface → conductive skin |
| Flat band | None | Surface behaves like bulk |
| Depletion | Upward (small) | Electrons repelled → high-resistance layer |
| Inversion | Upward (large) | Holes become majority at surface → p-type channel (basis of the MOSFET) |
4. Surface Recombination (Animation)
Surface states with energies near mid-gap are efficient recombination centres (Shockley-Read-Hall mechanism). Electrons and holes that diffuse to the surface are captured and annihilate there. The rate is expressed as
Us = S · Δn (carriers per cm² per second)where Δn is the excess carrier density at the surface and S is the surface recombination velocity (cm/s). S ranges from 10⁵–10⁶ cm/s for a bare, damaged silicon surface down to below 10 cm/s for an excellently passivated one.
For a thin wafer of thickness W with both surfaces identical, the measured effective lifetime combines bulk and surface losses:
1/τeff ≈ 1/τbulk + 2S/W5. Effects on Devices
- Surface leakage current in reverse-biased p-n junctions and photodiodes — higher dark current and noise.
- Reduced minority-carrier lifetime → lower efficiency of solar cells and lower gain of bipolar transistors.
- MOSFET instability: interface traps and oxide charges shift the threshold voltage, degrade sub-threshold slope and reduce channel mobility.
- 1/f (flicker) noise from carriers trapping and de-trapping at surface states.
- Fermi-level pinning at metal contacts → Schottky barrier height hard to control.
- Parasitic inversion channels between devices on a chip (hence field oxides and channel stops).
6. Surface Passivation
| Method | How it works | Used in |
|---|---|---|
| Thermal SiO₂ | Oxide bonds to surface Si atoms, removing most dangling bonds (chemical passivation) | ICs, planar transistors, MOSFET gates |
| Hydrogen anneal (forming gas, H₂/N₂) | H atoms tie up remaining dangling bonds at the Si/SiO₂ interface | CMOS process final step |
| Silicon nitride (SiNₓ:H) | Hydrogen passivation + positive fixed charge repels holes (field-effect passivation) | Front side of crystalline Si solar cells (also anti-reflection) |
| Aluminium oxide (Al₂O₃) | Negative fixed charge repels electrons | p-type surfaces, PERC solar cells |
| Cleaning (RCA clean), guard rings, glass/polyimide coatings | Remove contaminants; control surface fields and leakage | Diodes, high-voltage devices |
The planar process invented around 1959 (J. Hoerni, Fairchild) protected junctions under a thermally grown oxide — a key step that made integrated circuits reliable.
7. Solved Problems
Problem 1. A silicon wafer 200 µm thick has bulk lifetime 1 ms. Find the effective lifetime if S = 100 cm/s and if S = 10 cm/s on both surfaces.
- W = 0.02 cm; 1/τbulk = 1000 s⁻¹.
- S = 100 cm/s: 2S/W = 10 000 s⁻¹ ⇒ τeff = 1/11 000 ≈ 91 µs — the surface dominates.
- S = 10 cm/s: 2S/W = 1000 s⁻¹ ⇒ τeff = 1/2000 = 0.5 ms — passivation more than five-fold improves lifetime.
Problem 2. Excess carrier density at a surface is 10¹⁴ cm⁻³ and S = 10³ cm/s. Find the surface recombination rate. Us = S·Δn = 10³ × 10¹⁴ = 10¹⁷ cm⁻²s⁻¹.
8. Practice MCQs (click to see answer)
1. Surface states in a semiconductor are mainly caused by: (a) Doping atoms in bulk (b) Dangling bonds at the surface (c) Phonons (d) Excess holes
2. Surface states lie: (a) In the conduction band only (b) In the valence band only (c) Within the forbidden gap (d) Above vacuum level
3. The unit of surface recombination velocity is: (a) cm/s (b) s (c) cm⁻³ (d) eV
4. Surface passivation in silicon ICs is commonly done with: (a) Copper (b) SiO₂ (c) Gold (d) Mercury
5. High density of surface states can cause: (a) Fermi-level pinning (b) Superconductivity (c) Zero leakage (d) Infinite mobility
6. Theoretical surface states due to termination of the periodic potential are called: (a) Tamm and Shockley states (b) Bloch states (c) Frenkel defects (d) Cooper pairs
7. In a MOSFET, interface traps mainly affect: (a) Threshold voltage and mobility (b) Gate metal colour (c) Package size (d) Supply frequency
8. Silicon nitride on solar cells provides: (a) Only electrical contact (b) Passivation and anti-reflection (c) Doping (d) Metallization
9. বাংলায় দ্রুত রিভিশন
- সারফেসে কেলাসের নিয়মিত বিন্যাস শেষ হয়ে যায়, ফলে ড্যাংলিং বন্ড তৈরি হয়।
- এগুলো ব্যান্ড গ্যাপের ভেতরে শক্তিস্তর তৈরি করে — একে সারফেস স্টেট বলে (ট্যাম ও শকলি স্টেট)।
- সারফেস স্টেট চার্জ আটকে রাখে → ব্যান্ড বেন্ডিং, ডিপ্লেশন/অ্যাকুমুলেশন/ইনভার্শন স্তর এবং ফার্মি লেভেল পিনিং ঘটে।
- সারফেস রিকম্বিনেশন বেগ S (cm/s) — বেশি হলে লিকেজ কারেন্ট বাড়ে, সোলার সেলের দক্ষতা কমে, MOSFET-এর থ্রেশহোল্ড ভোল্টেজ সরে যায়।
- প্রতিকার: SiO₂, SiNₓ, Al₂O₃ দিয়ে প্যাসিভেশন এবং হাইড্রোজেন অ্যানিল।
Related Posts
- Unit Cell Types: SC, BCC & FCC
- Types of Solids: Crystalline, Polycrystalline & Amorphous
- Bandgap Tailoring in Semiconductors
- Integrated Circuits: Advantages & Disadvantages
References: S. M. Sze & K. K. Ng, Physics of Semiconductor Devices; Ben Streetman, Solid State Electronic Devices; A. Aberle, “Surface passivation of crystalline silicon solar cells”, Prog. Photovolt. 2000. Images and animations: original work by Totalecer.
Great explanation of how surface states accelerate recombination, highlighting why surface passivation is so critical in semiconductor device design.
ReplyDeleteThank you for reading and for the kind words! Surface passivation really is one of the key steps in making reliable semiconductor devices. Glad the explanation helped.
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